Timing Yield Calculation Using an Impulse-Train Approach

This paper presents a new method to compute the probability distribution of the delay of a combinational circuit and uses it obtain an estimate of the yield of the process that manufactures the circuit. We assume a simple delay model assigning a triangular distribution to the delay of a gate and ignore the logical function of the gate and the pinto-pin delay. The method can handle tree-like circuits as well as circuits with reconvergent fanout in them. The chief advantage of this method over conventional Monte-Carlo simulation is that it is much faster while providing comparable quality.

• Type: Conference
• Year: 2002
• Where: VLSID
• Authors: Srinath R. Naidu
• Keywords: Computer Architecture, Conventional Monte-carlo Simulation, Pinto-pin Delay, Simple Delay Model, VLSID 2002