139
click to vote
VLSID
16 years 28 days ago
2004 IEEE 
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
134
click to vote
VLSID
16 years 28 days ago
2004 IEEE 
This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
125
click to vote
FCCM
15 years 4 months ago
2004 IEEE
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit changing needs of a computation during run time. The increasing...
125
click to vote
FCCM
15 years 4 months ago
2004 IEEE 
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
124
click to vote
VLSID
16 years 28 days ago
2004 IEEE
As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts...
|
VLSI