This short paper explores an implementation of a new technology called 3D die stacking and describes research activity at Intel. 3D die stacking is the bonding of two die either f...
Bryan Black, Donald Nelson, Clair Webb, Nick Samra
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Re...
Highly scalable video compression based on invertible motion adaptive lifting transforms has emerged as a promising area in image processing research and an important component in...