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ICCD
2004
IEEE
131views Hardware» more  ICCD 2004»
14 years 7 months ago
3D Processing Technology and Its Impact on iA32 Microprocessors
This short paper explores an implementation of a new technology called 3D die stacking and describes research activity at Intel. 3D die stacking is the bonding of two die either f...
Bryan Black, Donald Nelson, Clair Webb, Nick Samra
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 5 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
14 years 4 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
14 years 4 months ago
An automated design flow for 3D microarchitecture evaluation
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Re...
ICIP
2003
IEEE
15 years 12 days ago
Context modeling and accessibility for 3D scalable compression
Highly scalable video compression based on invertible motion adaptive lifting transforms has emerged as a promising area in image processing research and an important component in...
Raymond Leung, David Taubman