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FPL
2006
Springer
95views Hardware» more  FPL 2006»
13 years 11 months ago
A Reconfigurable Functional Unit for an Adaptive Dynamic Extensible Processor
This paper presents a reconfigurable functional unit (RFU) for an adaptive dynamic extensible processor. The processor can tune its extended instructions to the target application...
Hamid Noori, Farhad Mehdipour, Kazuaki Murakami, K...
ASPDAC
2000
ACM
131views Hardware» more  ASPDAC 2000»
13 years 11 months ago
Reconfigurable synchronized dataflow processor
- This paper describes the design and implementation of a reconfigurable synchronized dataflow processor (RSDP). The RSDP can configure its hardware to directly represent dataflow ...
Hiroshi Sasaki, Hitoshi Maruyama, Hideaki Tsukioka...
FPGA
2000
ACM
145views FPGA» more  FPGA 2000»
13 years 11 months ago
A C compiler for a processor with a reconfigurable functional unit
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerje...
FPL
2008
Springer
96views Hardware» more  FPL 2008»
13 years 9 months ago
Low-latency high-bandwidth HW/SW communication in a virtual memory environment
Adaptive computers combine conventional software programmable processors with reconfigurable compute units. We present techniques that allow the high-performance realization of de...
Holger Lange, Andreas Koch
IPPS
1998
IEEE
13 years 12 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf