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DELTA
2010
IEEE
14 years 24 days ago
Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor
Reconfigurable many-core processors have many advantages over conventionally designed devices, such as low power consumption and very high flexibility. For an increasing number of...
Hans G. Kerkhoff, Xiao Zhang
CHES
2000
Springer
167views Cryptology» more  CHES 2000»
14 years 2 days ago
A High Performance Reconfigurable Elliptic Curve Processor for GF(2m)
This work proposes a processor architecture for elliptic curves cryptosystems over fields GF(2m ). This is a scalable architecture in terms of area and speed that exploits the abil...
Gerardo Orlando, Christof Paar
ISCAS
2007
IEEE
111views Hardware» more  ISCAS 2007»
14 years 2 months ago
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform
—Various instruction and transaction based power estimation techniques for processor and on-chip buses have been proposed in the past. In this paper, we propose a heterogeneous p...
Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdoga...
FPL
2004
Springer
119views Hardware» more  FPL 2004»
13 years 11 months ago
Reconfigurable Instruction Set Extension for Enabling ECC on an 8-Bit Processor
Pervasive networks with low-cost embedded 8-bit processors are set to change our day-to-day life. Public-key cryptography provides crucial functionality to assure security which is...
Sandeep S. Kumar, Christof Paar
ICFP
2010
ACM
13 years 8 months ago
The reduceron reconfigured
The leading implementations of graph reduction all target conventional processors designed for low-level imperative execution. In this paper, we present a processor specially desi...
Matthew Naylor, Colin Runciman