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ISSS
2002
IEEE
154views Hardware» more  ISSS 2002»
15 years 8 months ago
Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops
Software pipelining and unfolding are commonly used techniques to increase parallelism for DSP applications. However, these techniques expand the code size of the application sign...
Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edw...
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
15 years 8 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
ISLPED
2007
ACM
84views Hardware» more  ISLPED 2007»
15 years 5 months ago
Towards a software approach to mitigate voltage emergencies
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. One a...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
HPCA
2000
IEEE
15 years 8 months ago
Software-Controlled Multithreading Using Informing Memory Operations
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
Todd C. Mowry, Sherwyn R. Ramkissoon
124
Voted
SMC
2007
IEEE
105views Control Systems» more  SMC 2007»
15 years 10 months ago
A software architecture for adaptive modular sensing systems
Abstract—In this paper, a software architecture and knowledge representation scheme that enables the combination and reconfiguration of modular sensor and actuator components is...
Andrew C. Lyle, Michael D. Naish