Towards a software approach to mitigate voltage emergencies

Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. One approach suggested has been to not only react to these fluctuations but also attempt to eliminate future occurrences of these fluctuations by dynamically modifying the executing program. This paper investigates the potential of a very simple dynamic scheme to appreciably reduce the number of run-time voltage emergencies. It shows that we can map many of the voltage emergencies in the execution of the SPEC2000 benchmarks on an aggressive superscalar design to a few static loops, categorize the microarchitectural cause of the emergencies in each important loop through simple observations and a simple priority function, and finally apply straightforward software optimization strategies to mitigate up to 70% of the future voltage swings. Categories and Subject Descriptors C.0 [ Computer Systems Organization]: G...

• Type: Conference
• Year: 2007
• Where: ISLPED
• Authors: Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David Brooks
• Keywords: Hardware, ISLPED 2007, Run-time Voltage Emergencies, Voltage, Voltage Emergencies