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ISCAS
2006
IEEE
100views Hardware» more  ISCAS 2006»
14 years 3 months ago
Power system on a chip (PSoC)
— This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper wil...
Chika O. Nwankpa, A. S. Deese, Qingyan Liu, Aaron ...
CC
2007
Springer
14 years 4 months ago
Preprocessing Strategy for Effective Modulo Scheduling on Multi-issue Digital Signal Processors
To achieve high resource utilization for multi-issue Digital Signal Processors (DSPs), production compilers commonly include variants of the iterative modulo scheduling algorithm. ...
Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung...
IEEEPACT
2006
IEEE
14 years 3 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
POPL
2008
ACM
14 years 10 months ago
A theory of platform-dependent low-level software
The C language definition leaves the sizes and layouts of types partially unspecified. When a C program makes assumptions about type layout, its semantics is defined only on platf...
Marius Nita, Dan Grossman, Craig Chambers
DATE
2000
IEEE
137views Hardware» more  DATE 2000»
14 years 2 months ago
Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors DSPs using the modeling language LISA. In the past, the principl...
Stefan Pees, Andreas Hoffmann, Heinrich Meyr