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148
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SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
15 years 9 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
130
Voted
IROS
2009
IEEE
170views Robotics» more  IROS 2009»
15 years 10 months ago
A programming architecture for smart autonomous underwater vehicles
— Autonomous underwater vehicles (AUVs) are an indispensable tool for marine scientists to study the world’s oceans. The Slocum glider is a buoyancy driven AUV designed for mis...
Hans C. Woithe, Ulrich Kremer
122
Voted
CCR
2010
105views more  CCR 2010»
15 years 3 months ago
A platform for high performance and flexible virtual routers on commodity hardware
Multi-core CPUs, along with recent advances in memory and buses, render commodity hardware a strong candidate for software router virtualization. In this context, we present the d...
Norbert Egi, Adam Greenhalgh, Mark Handley, Micka&...
250
Voted
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
15 years 3 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
CGO
2010
IEEE
15 years 8 months ago
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
In this paper we describe techniques for compiling finegrained SPMD-threaded programs, expressed in programming models such as OpenCL or CUDA, to multicore execution platforms. Pr...
John A. Stratton, Vinod Grover, Jaydeep Marathe, B...