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» A CORDIC Based Programmable DXT Processor Array
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VLSID
1994
IEEE
151views VLSI» more  VLSID 1994»
13 years 11 months ago
A CORDIC Based Programmable DXT Processor Array
A CORDIC based processor array which can be programmed by switch settings to compute the Discrete Hariley, Cosine or Sine lhnsforms or their inverses is described. Through a novel...
V. K. Anuradha, V. Visvanathan
ASAP
2007
IEEE
111views Hardware» more  ASAP 2007»
14 years 1 months ago
Entropy Coding on a Programmable Processor Array for Multimedia SoC
Entropy encoding and decoding is a crucial part of any multimedia system that can be highly demanding in terms of computing power. Hardware implementation of typical compression a...
Roberto R. Osorio, Javier D. Bruguera
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
14 years 9 days ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
TSP
2008
90views more  TSP 2008»
13 years 7 months ago
Array-Based QR-RLS Multichannel Lattice Filtering
An array-based algorithm for multichannel lattice filtering is proposed. The filter is formed by a set of units that are adapted locally and concurrently using recursions that clos...
J. Gomes, V. A. N. Barroso
VLSISP
2010
205views more  VLSISP 2010»
13 years 5 months ago
Adaptable, Fast, Area-Efficient Architecture for Logarithm Approximation with Arbitrary Accuracy on FPGA
— This paper presents ALA (Adaptable Logarithm Approximation), a novel hardware architecture for the approximation of the base-2 logarithm of integers at an arbitrary accuracy, s...
Dimitris G. Bariamis, Dimitris Maroulis, Dimitrios...