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DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 1 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
ISCA
2012
IEEE
260views Hardware» more  ISCA 2012»
11 years 11 months ago
A case for exploiting subarray-level parallelism (SALP) in DRAM
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Li...
MSS
2003
IEEE
130views Hardware» more  MSS 2003»
14 years 1 months ago
zFS - A Scalable Distributed File System Using Object Disks
zFS is a research project aimed at building a decentralized file system that distributes all aspects of file and storage management over a set of cooperating machines interconne...
Ohad Rodeh, Avi Teperman
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
14 years 3 months ago
Cycle-approximate Retargetable Performance Estimation at the Transaction Level
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
Yonghyun Hwang, Samar Abdi, Daniel Gajski
CASES
2003
ACM
14 years 1 months ago
Frequent loop detection using efficient non-intrusive on-chip hardware
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting ...
Ann Gordon-Ross, Frank Vahid