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DSD
2009
IEEE
144views Hardware» more  DSD 2009»
14 years 3 months ago
Composable Resource Sharing Based on Latency-Rate Servers
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...
Benny Akesson, Andreas Hansson, Kees Goossens
LCTRTS
2000
Springer
14 years 4 days ago
An Integrated Push/Pull Buffer Management Method in Multimedia Communication Environments
Multimedia communication systems require not only high-performance computer hardware and highspeed networks, but also a buffer management mechanism to process voluminous data effi...
Sungyoung Lee, Hyonwoo Seung, Taewoong Jeon
ASAP
2007
IEEE
133views Hardware» more  ASAP 2007»
14 years 2 months ago
GISP: A Transparent Superpage Support Framework for Linux
Though all of the current main-stream OSs have supported superpage to some extent, most of them need runtime information provided by applications, simulator or other tools. Transp...
Ning Qu, Yansong Zheng, Wei Cao, Xu Cheng
ISPASS
2010
IEEE
14 years 3 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
TVLSI
2002
100views more  TVLSI 2002»
13 years 8 months ago
Architectural strategies for low-power VLSI turbo decoders
Abstract--The use of "turbo codes" has been proposed for several applications, including the development of wireless systems, where highly reliable transmission is requir...
Guido Masera, M. Mazza, Gianluca Piccinini, F. Vig...