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» A Computational Theory of Working Memory
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VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
14 years 9 months ago
Analyzing Soft Errors in Leakage Optimized SRAM Design
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jan...
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
14 years 3 months ago
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
EMMCVPR
2007
Springer
14 years 3 months ago
Continuous Global Optimization in Multiview 3D Reconstruction
Abstract. In this work, we introduce a robust energy model for multiview 3D reconstruction that fuses silhouette- and stereo-based image information. It allows to cope with signiï¬...
Kalin Kolev, Maria Klodt, Thomas Brox, Selim Esedo...
LCN
2006
IEEE
14 years 3 months ago
Minimizing Cache Misses in an Event-driven Network Server: A Case Study of TUX
We analyze the performance of CPU-bound network servers and demonstrate experimentally that the degradation in the performance of these servers under highconcurrency workloads is ...
Sapan Bhatia, Charles Consel, Julia L. Lawall
ASPDAC
2007
ACM
81views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Fault Dictionary Size Reduction for Million-Gate Large Circuits
- In general, fault dictionary is prevented from practical applications for its extremely large size. Several previous works are proposed for the fault dictionary size reduction. H...
Yu-Ru Hong, Juinn-Dar Huang