1002 search results - page 98 / 201 » A Computer Aided Grading System for Subjective Tests |
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...