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» A Decompression Architecture for Low Power Embedded Systems
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DAC
2006
ACM
15 years 10 months ago
Hierarchical power distribution and power management scheme for a single chip mobile processor
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
Toshihiro Hattori, Takahiro Irita, Masayuki Ito, E...
CBSE
2004
Springer
15 years 9 months ago
Introducing a Component Technology for Safety Critical Embedded Real-Time Systems
Safety critical embedded real-time systems represent a class of systems that has attracted relatively little attention in research addressing component based software engineering. ...
Kristian Sandström, Johan Fredriksson, Mikael...
EUC
2006
Springer
15 years 8 months ago
Saving Register-File Leakage Power by Monitoring Instruction Sequence in ROB
- Modern portable or embedded systems support more and more complex applications. These applications make embedded devices require not only low powerconsumption, but also high comp...
Wann-Yun Shieh, Hsin-Dar Chen
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
15 years 11 months ago
Single ended 6T SRAM with isolated read-port for low-power embedded systems
Abstract— This paper presents a six-transistor (6T) singleended static random access memory (SE-SRAM) bitcell with an isolated read-port, suitable for low-Î and low-power embedd...
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Sara...
ISLPED
2009
ACM
132views Hardware» more  ISLPED 2009»
15 years 11 months ago
Enabling ultra low voltage system operation by tolerating on-chip cache failures
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...