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ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
13 years 9 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
CHI
2004
ACM
14 years 2 months ago
The untapped world of video games
Due to fierce industry competition and demand for novelty, games are a fertile research setting for studying interface design, input devices, graphics, social communication and de...
Kevin Keeker, Randy J. Pagulayan, Jonathan Sykes, ...
MICRO
1992
IEEE
128views Hardware» more  MICRO 1992»
14 years 1 months ago
MISC: a Multiple Instruction Stream Computer
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
CONEXT
2009
ACM
13 years 10 months ago
RFDump: an architecture for monitoring the wireless ether
Networking researchers have been using tools like wireshark and tcpdump to sniff packets on physical links that use different types of datalink protocols, e.g. Ethernet or 802.11,...
Kaushik Lakshminarayanan, Samir Sapra, Srinivasan ...
ICECCS
2005
IEEE
125views Hardware» more  ICECCS 2005»
14 years 2 months ago
Model Checking Live Sequence Charts
Live Sequence Charts (LSCs) are a broad extension to Message Sequence Charts (MSCs) to capture complex interobject communication rigorously. A tool support for LSCs, named PlayEng...
Jun Sun 0001, Jin Song Dong