—This paper presents an operational semantics of the repetitive model of computation, which is the basis for the repetitive structure modeling (RSM) package defined in the stand...
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constr...
Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Sam...
Abstract. We present a new parallel computation model called the Parallel ResourceOptimal computation model. PRO is a framework being proposed to enable the design of efficient and...
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
The research presented in this paper aims to inform interface design for mobile guides by understanding and modelling the built environments in which the guide will be used. This ...