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ISCA
2011
IEEE
290views Hardware» more  ISCA 2011»
13 years 4 days ago
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
Blas Cuesta, Alberto Ros, María Engracia G&...
SC
1995
ACM
13 years 12 months ago
Lazy Release Consistency for Hardware-Coherent Multiprocessors
Release consistency is a widely accepted memory model for distributed shared memory systems. Eager release consistency represents the state of the art in release consistent protoc...
Leonidas I. Kontothanassis, Michael L. Scott, Rica...
ISCA
2003
IEEE
104views Hardware» more  ISCA 2003»
14 years 1 months ago
Token Coherence: Decoupling Performance and Correctness
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
Milo M. K. Martin, Mark D. Hill, David A. Wood
IEEEPACT
1998
IEEE
14 years 20 days ago
Optical versus Electronic Bus for Address-Transactions in Future SMP Architectures
The fast evolution of processor performance necessitates a permanent evolution of all the multiprocessor components, even for small to medium-scale symmetric multiprocessors (SMP)...
Wissam Hlayhel, Daniel Litaize, Laurent Fesquet, J...
JLP
2007
95views more  JLP 2007»
13 years 8 months ago
Model checking a cache coherence protocol of a Java DSM implementation
Jackal is a fine-grained distributed shared memory implementation of the Java programming language. It aims to implement Java’s memory model and allows multithreaded Java progr...
Jun Pang, Wan Fokkink, Rutger F. H. Hofman, Ronald...