1834 search results - page 249 / 367 » A Dynamic Multithreading Processor |
CCGRID
2005
IEEE
14 years 3 months ago
2005
IEEE
Dynamically partitioning of adaptive applications and migration of excess workload from overloaded processors to underloaded processors during execution are critical techniques ne...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
MICRO
2002
IEEE
14 years 3 months ago
2002
IEEE
In this paper we present an approach to boosting performance and tolerating latency by deferring non-critical instructions into a deferred queue for later processing. As such, ins...
ISCA
1999
IEEE
14 years 2 months ago
1999
IEEE
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
HPCA
1998
IEEE
14 years 2 months ago
1998
IEEE
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...