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» A Dynamic Multithreading Processor
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CHI
2009
ACM
14 years 9 months ago
TypeRight: a keyboard with tactile error prevention
TYPERIGHT is a new tactile input device for text entry. It combines the advantages of tactile feedback with error prevention methods of word processors. TYPERIGHT extends the stan...
Alexander Hoffmann, Daniel Spelmezan, Jan O. Borch...
HPCA
2007
IEEE
14 years 9 months ago
Evaluating MapReduce for Multi-core and Multiprocessor Systems
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, G...
HPCA
2005
IEEE
14 years 9 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
HPCA
2002
IEEE
14 years 9 months ago
Bandwidth Adaptive Snooping
This paper advocates that cache coherence protocols use a bandwidth adaptive approach to adjust to varied system configurations (e.g., number of processors) and workload behaviors...
Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, ...
ICCD
2007
IEEE
98views Hardware» more  ICCD 2007»
14 years 5 months ago
Evaluating voltage islands in CMPs under process variations
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Alok N...