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» A Dynamic Multithreading Processor
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CODES
2007
IEEE
14 years 3 months ago
Event-based re-training of statistical contention models for heterogeneous multiprocessors
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
CODES
2007
IEEE
14 years 3 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
IPPS
2007
IEEE
14 years 3 months ago
An Adaptive Semantic Filter for Blue Gene/L Failure Log Analysis
— Frequent failure occurrences are becoming a serious concern to the community of high-end computing, especially when the applications and the underlying systems rapidly grow in ...
Yinglung Liang, Yanyong Zhang, Hui Xiong, Ramendra...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 3 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
MICRO
2007
IEEE
164views Hardware» more  MICRO 2007»
14 years 3 months ago
A Practical Approach to Exploiting Coarse-Grained Pipeline Parallelism in C Programs
The emergence of multicore processors has heightened the need for effective parallel programming practices. In addition to writing new parallel programs, the next generation of pr...
William Thies, Vikram Chandrasekhar, Saman P. Amar...