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» A Family of Logical Fault Models for Reversible Circuits
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DATE
2003
IEEE
120views Hardware» more  DATE 2003»
14 years 23 days ago
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step
Abstract — This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay defect d...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-...
AAAI
1996
13 years 8 months ago
Qualitative Multiple-Fault Diagnosis of Continuous Dynamic Systems Using Behavioral Modes
Most model-based diagnosis systems, such as GDE and Sherlock, have concerned discrete, static systems such as logic circuits and use simple constraint propagation to detect incons...
Siddarth Subramanian, Raymond J. Mooney
ATS
2003
IEEE
75views Hardware» more  ATS 2003»
14 years 23 days ago
An Enhanced Test Generator for Capacitance Induced Crosstalk Delay Faults
Capacitive crosstalk can give rise to slowdown of signals that can propagate to a circuit output and create a functional error. A test generation methodology, called XGEN, was dev...
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
ISQED
2002
IEEE
106views Hardware» more  ISQED 2002»
14 years 11 days ago
Trading off Reliability and Power-Consumption in Ultra-low Power Systems
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
Atul Maheshwari, Wayne Burleson, Russell Tessier
VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
14 years 1 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...