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» A Fast KNN Algorithm Based on Simulated Annealing
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DATE
2000
IEEE
142views Hardware» more  DATE 2000»
14 years 10 days ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
ICASSP
2007
IEEE
14 years 2 months ago
Fast Mode Decision for H.264 Based on Rate-Distortion Cost Estimation
A fast mode decision algorithm for an H.264 encoder is proposed which reduces computation by using a statistical dependency of macroblock rate-distortion (RD) costs. The algorithm...
Yao-Chung Lin, Torsten Fink, Erwin B. Bellers
ICDE
2006
IEEE
154views Database» more  ICDE 2006»
14 years 1 months ago
Efficient Image Classification on Vertically Decomposed Data
Organizing digital images into semantic categories is imperative for effective browsing and retrieval. In large image collections, an efficient algorithm is crucial to quickly cat...
Taufik Abidin, Aijuan Dong, Honglin Li, William Pe...
ICCAD
2005
IEEE
134views Hardware» more  ICCAD 2005»
14 years 1 months ago
Fast thermal simulation for architecture level dynamic thermal management
As power density increases exponentially, runtime regulation of operating temperature by dynamic thermal managements becomes necessary. This paper proposes a novel approach to the...
Pu Liu, Zhenyu Qi, Hang Li, Lingling Jin, Wei Wu, ...
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
14 years 4 months ago
A Trajectory Piecewise-Linear Approach to Model Order Reduction and Fast Simulation of Nonlinear Circuits and Micromachined Devi
—In this paper, we present an approach to nonlinear model reduction based on representing a nonlinear system with a piecewise-linear system and then reducing each of the pieces w...
Michal Rewienski, Jacob White