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ICRA
1994
IEEE
118views Robotics» more  ICRA 1994»
14 years 1 months ago
Developing Parallel Architectures for Range and Image Sensors
We describe a cost-effective method for developing parallel architectures which increase the performance of range and image sensors. A parametrised edge detector and its systolic ...
Shaori Guo, Wayne Luk, Penelope Probert
DFT
2007
IEEE
152views VLSI» more  DFT 2007»
14 years 1 months ago
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...
Cristiana Bolchini, Antonio Miele, Marco D. Santam...
IJCAT
2010
273views more  IJCAT 2010»
13 years 8 months ago
FPGA implementation of log-polar mapping
Log-polar or spatially-variant image representation is an important component of active vision system in tracking process for many robotic applications due to its data compression ...
Wai Kit Wong, Chee Wee Choo, Chu Kiong Loo, Joo Pe...
TPDS
2010
260views more  TPDS 2010»
13 years 8 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear
VLSISP
2010
205views more  VLSISP 2010»
13 years 8 months ago
Adaptable, Fast, Area-Efficient Architecture for Logarithm Approximation with Arbitrary Accuracy on FPGA
— This paper presents ALA (Adaptable Logarithm Approximation), a novel hardware architecture for the approximation of the base-2 logarithm of integers at an arbitrary accuracy, s...
Dimitris G. Bariamis, Dimitris Maroulis, Dimitrios...