338 search results - page 31 / 68 » A Field-Programmable Mixed-Analog-Digital Array |
ISCAS
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
ARC
2009
Springer
14 years 3 months ago
2009
Springer
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
SBRN
1998
IEEE
14 years 3 months ago
1998
IEEE
As the demand for higher performance computers for the processing of remote sensing science algorithms increases, the need to investigate new computing paradigms is justified. Fie...
FCCM
2009
IEEE
14 years 2 months ago
2009
IEEE
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...