Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. The DECOS architec...
Philipp Peti, Roman Obermaisser, Fulvio Tagliabo, ...
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...
Timing and power consumption of embedded systems are state and input data dependent. Formal analysis of such dependencies leads to intervals rather than single values. These inter...
—A new lightweight planar parallel platform aims to greatly improve operational speed of electronic manufacturing process and to realize a “smart parallel platform” through t...
This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...
Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya,...