Sciweavers

189 search results - page 22 / 38
» A Functional DBPL Revealing High Level Optimizations
Sort
View
ISPD
1999
ACM
127views Hardware» more  ISPD 1999»
13 years 12 months ago
Buffer insertion for clock delay and skew minimization
 Buffer insertion is an effective approach to achieve both minimal clock signal delay and skew in high speed VLSI circuit design. In this paper, we develop an optimal buffer ins...
X. Zeng, D. Zhou, Wei Li
BMCBI
2005
117views more  BMCBI 2005»
13 years 7 months ago
An SVM-based system for predicting protein subnuclear localizations
Background: The large gap between the number of protein sequences in databases and the number of functionally characterized proteins calls for the development of a fast computatio...
Zhengdeng Lei, Yang Dai
IEEEINTERACT
2003
IEEE
14 years 25 days ago
A Region-Based Compilation Infrastructure
: The traditional framework for back-end compilation is based on the scope of functions, which is a natural boundary to partition an entire program for compilation. However, the si...
Yang Liu, Zhaoqing Zhang, Ruliang Qiao, Roy Dz-Chi...
TWC
2008
177views more  TWC 2008»
13 years 7 months ago
Generalized Design of Multi-User MIMO Precoding Matrices
In this paper we introduce a novel linear precoding technique. The approach used for the design of the precoding matrix is general and the resulting algorithm can address several o...
Veljko Stankovic, Martin Haardt
DATE
2003
IEEE
116views Hardware» more  DATE 2003»
14 years 26 days ago
Development and Application of Design Transformations in ForSyDe
The ForSyDe methodology has been developed for system level design. Starting with a formal specification model, that captures the functionality of the system at a high abstractio...
Ingo Sander, Axel Jantsch, Zhonghai Lu