Sciweavers

1998 search results - page 284 / 400
» A Hardware Implementation of PRAM and Its Performance Evalua...
Sort
View
AI
1999
Springer
15 years 5 months ago
Learning by Discovering Concept Hierarchies
We present a new machine learning method that, given a set of training examples, induces a definition of the target concept in terms of a hierarchy of intermediate concepts and th...
Blaz Zupan, Marko Bohanec, Janez Demsar, Ivan Brat...
FAST
2009
15 years 3 months ago
Generating Realistic Impressions for File-System Benchmarking
The performance of file systems and related software depends on characteristics of the underlying file-system image (i.e., file-system metadata and file contents). Unfortunately, ...
Nitin Agrawal, Andrea C. Arpaci-Dusseau, Remzi H. ...
CODES
2005
IEEE
15 years 11 months ago
CRAMES: compressed RAM for embedded systems
Memory is a scarce resource in many embedded systems. Increasing memory often increases packaging and cooling costs, size, and energy consumption. This paper presents CRAMES, an e...
Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 26 days ago
System-level process variability analysis and mitigation for 3D MPSoCs
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
Siddharth Garg, Diana Marculescu
159
Voted
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
16 years 23 days ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim