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TVLSI
2010
13 years 3 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
HPDC
2000
IEEE
14 years 1 months ago
An Evaluation of Alternative Designs for a Grid Information Service
Computational grids consisting of large and diverse sets of distributed resources have recently been adopted by organizations such as NASA and the NSF. One key component of a comp...
Warren Smith, Abdul Waheed, David Meyers, Jerry C....
DATE
2008
IEEE
82views Hardware» more  DATE 2008»
14 years 3 months ago
A Triple-Mode Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications
This paper presents the implementation and experimental characterization of a reconfigurable ΣΔ modulator intended for multi-mode wireless receivers that is capable to perform t...
Alonso Morgado, Rocio del Río, José ...
CCECE
2006
IEEE
14 years 3 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
SBACPAD
2003
IEEE
120views Hardware» more  SBACPAD 2003»
14 years 2 months ago
Comparison of Genomes Using High-Performance Parallel Computing
Comparison of the DNA sequences and genes of two genomes can be useful to investigate the common functionalities of the corresponding organisms and get a better understanding of h...
Nalvo F. Almeida Jr., Carlos E. R. Alves, Edson C&...