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» A Heterogeneous Lightweight Multithreaded Architecture
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IEEEPACT
2008
IEEE
14 years 4 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
HPCA
2007
IEEE
14 years 10 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
ISCA
2010
IEEE
340views Hardware» more  ISCA 2010»
14 years 2 months ago
Necromancer: enhancing system throughput by animating dead cores
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
ASPLOS
2010
ACM
14 years 2 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
FGCN
2007
IEEE
125views Communications» more  FGCN 2007»
13 years 10 months ago
Evaluation of a Simple Load Balancing Improvement for Reliable Server Pooling with Heterogeneous Server Pools
The IETF is currently standardizing a light-weight protocol framework for server redundancy and session failover: Reliable Server Pooling (RSerPool). It is the novel combination o...
Xing Zhou, Thomas Dreibholz, Erwin P. Rathgeb