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ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
14 years 5 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar
HPCA
2009
IEEE
14 years 3 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
CHES
2007
Springer
327views Cryptology» more  CHES 2007»
14 years 3 months ago
On the Power of Bitslice Implementation on Intel Core2 Processor
Abstract. This paper discusses the state-of-the-art fast software implementation of block ciphers on Intel’s new microprocessor Core2, particularly concentrating on “bitslice i...
Mitsuru Matsui, Junko Nakajima
ANCS
2006
ACM
14 years 3 months ago
Localized asynchronous packet scheduling for buffered crossbar switches
Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspo...
Deng Pan, Yuanyuan Yang
SIGGRAPH
1999
ACM
14 years 1 months ago
Realistic, Hardware-Accelerated Shading and Lighting
With fast 3D graphics becoming more and more available even on low end platforms, the focus in hardware-accelerated rendering is beginning to shift towards higher quality renderin...
Wolfgang Heidrich, Hans-Peter Seidel