122 search results - page 16 / 25 » A High-Performance Hardware Architecture for Spectral Hash A... |
137
Voted
TPDS
2010
15 years 24 days ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
106
Voted
FPL
2001
Springer
15 years 7 months ago
2001
Springer
Although FPGA technology offers the potential of designing high performance systems at low cost, its programming model is prohibitively low level. To allow a novice signal/image pr...
102
Voted
ISCAS
1995
IEEE
15 years 6 months ago
1995
IEEE
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
201
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SIGCOMM
1995
ACM
15 years 6 months ago
1995
ACM
MD5 is an authentication algorithm proposed as the required implementation of the authentication option in IPv6. This paper presents an analysis of the speed at which MD5 can be i...
108
Voted
CGO
2007
IEEE
15 years 8 months ago
2007
IEEE
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...