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SIPS
2006
IEEE
14 years 1 months ago
Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...
Ning Chen, Yongmei Dai, Zhiyuan Yan
MCSS
2009
Springer
14 years 11 hour ago
Multi-user OFDM Based on Braided Convolutional Codes
Abstract Braided convolutional codes (BCCs) form a class of iteratively decodable convolutional codes that are constructed from component convolutional codes. In braided code divis...
Michael Lentmaier, Marcos B. S. Tavares, Gerhard F...
CORR
2010
Springer
109views Education» more  CORR 2010»
13 years 7 months ago
Dirty Paper Coding using Sign-bit Shaping and LDPC Codes
Dirty paper coding (DPC) refers to methods for pre-subtraction of known interference at the transmitter of a multiuser communication system. There are numerous applications for DPC...
G. Shilpa, Andrew Thangaraj, Srikrishna Bhashyam
VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
14 years 1 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
14 years 1 months ago
Disclosing the LDPC code decoder design space
The design of future communication systems with high throughput demands will become a critical task, especially when sophisticated channel coding schemes have to be applied. LDPC ...
Torben Brack, Frank Kienle, Norbert Wehn