110 search results - page 17 / 22 » A Highly-Configurable Cache Architecture for Embedded System... |
NOCS
2007
IEEE
14 years 2 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
ISCA
2003
IEEE
14 years 1 months ago
2003
IEEE
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
FCCM
2006
IEEE
14 years 2 months ago
2006
IEEE
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
WMPI
2004
ACM
14 years 2 months ago
2004
ACM
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
WCET
2010
13 years 6 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...