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» A Hybrid Memory Sub-system for Video Coding Applications
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PPAM
2007
Springer
14 years 1 months ago
A Container-Iterator Parallel Programming Model
There are several parallel programming models available for numerical computations at diļ¬€erent levels of expressibility and ease of use. For the development of new domain speciļ¬...
Gerhard W. Zumbusch
VLSID
2004
IEEE
209views VLSI» more  VLSID 2004»
14 years 8 months ago
An Architecture for Motion Estimation in the Transform Domain
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, ...
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 28 days ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
INFOCOM
2009
IEEE
14 years 2 months ago
Rateless Coding with Feedback
The erasure resilience of rateless codes, such as Luby-Transform (LT) codes, makes them particularly suitable to a wide variety of loss-prone wireless and sensor network applicati...
Andrew Hagedorn, Sachin Agarwal, David Starobinski...
DAC
1997
ACM
13 years 11 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...