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» A Hybrid Memory Sub-system for Video Coding Applications
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ICCAD
2007
IEEE
123views Hardware» more  ICCAD 2007»
14 years 4 months ago
Mapping model with inter-array memory sharing for multidimensional signal processing
Abstract – The storage requirements in data-intensive signal processing systems (including applications in video and image processing, artificial vision, medical imaging, real-t...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
13 years 11 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
14 years 1 months ago
Region-level approximate computation reuse for power reduction in multimedia applications
ABSTRACT Motivated by data value locality and quality tolerance present in multimedia applications, we propose a new micro-architecture, Region-level Approximate Computation Buffer...
Xueqi Cheng, Michael S. Hsiao
ISCAPDCS
2007
13 years 9 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
14 years 1 months ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...