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» A Java processor architecture for embedded real-time systems
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DAC
2006
ACM
14 years 9 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
RTCSA
2007
IEEE
14 years 3 months ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
JMM2
2007
118views more  JMM2 2007»
13 years 8 months ago
FPGA-based Real-time Optical Flow Algorithm Design and Implementation
—Optical flow algorithms are difficult to apply to robotic vision applications in practice because of their extremely high computational and frame rate requirements. In most case...
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson
DATE
2008
IEEE
102views Hardware» more  DATE 2008»
14 years 3 months ago
Vectorization of Reed Solomon Decoding and Mapping on the EVP
Reed Solomon (RS) codes are used in a variety of (wireless) communication systems. Although commonly implemented in dedicated hardware, this paper explores the mapping of high-thr...
Akash Kumar, Kees van Berkel
DATE
2004
IEEE
139views Hardware» more  DATE 2004»
14 years 13 days ago
Flexible Software Protection Using Hardware/Software Codesign Techniques
A strong level of trust in the software running on an embedded processor is a prerequisite for its widespread deployment in any high-risk system. The expanding field of software p...
Joseph Zambreno, Alok N. Choudhary, Rahul Simha, B...