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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
14 years 1 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
13 years 12 days ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
HPCA
2002
IEEE
14 years 9 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...
SPAA
2003
ACM
14 years 1 months ago
The effect of communication costs in solid-state quantum computing architectures
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
Dean Copsey, Mark Oskin, Tzvetan S. Metodi, Freder...
MA
1999
Springer
110views Communications» more  MA 1999»
14 years 28 days ago
Hive: Distributed Agents for Networking Things
Hive is a distributed agents platform, a decentralized system for building applications by networking local system resources. This paper presents the architecture of Hive, concent...
Nelson Minar, Matthew Gray, Oliver Roup, Raffi Kri...