Sciweavers

265 search results - page 13 / 53
» A Logic Programming Framework for Combinational Circuit Synt...
Sort
View
AICCSA
2007
IEEE
84views Hardware» more  AICCSA 2007»
14 years 2 months ago
Encoding Algorithms for Logic Synthesis
This paper presents an encoding algorithm that is very efficient for many different logic synthesis problems. The algorithm is based on the use of special tables and includes two ...
Valery Sklyarov, Iouliia Skliarova
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
14 years 1 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
GLVLSI
2010
IEEE
209views VLSI» more  GLVLSI 2010»
14 years 21 days ago
Enhancing debugging of multiple missing control errors in reversible logic
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
Jean Christoph Jung, Stefan Frehse, Robert Wille, ...
POPL
2009
ACM
14 years 8 months ago
A combination framework for tracking partition sizes
ibe an abstract interpretation based framework for proving relationships between sizes of memory partitions. Instances of this framework can prove traditional properties such as m...
Sumit Gulwani, Tal Lev-Ami, Mooly Sagiv
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
13 years 11 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...