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ENTCS
2008
101views more  ENTCS 2008»
13 years 7 months ago
Imperative LF Meta-Programming
Logical frameworks have enjoyed wide adoption as meta-languages for describing deductive systems. While the techniques for representing object languages in logical frameworks are ...
Aaron Stump
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
14 years 4 months ago
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
Mihir R. Choudhury, Quming Zhou, Kartik Mohanram
DAC
2007
ACM
14 years 8 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
TCAD
1998
125views more  TCAD 1998»
13 years 7 months ago
BDD-based synthesis of extended burst-mode controllers
Abstract—We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
14 years 1 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...