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AUSAI
2007
Springer
15 years 10 months ago
Planning as Satisfiability with Relaxed $-Step Plans
Planning as satisfiability is a powerful approach to solving domain independent planning problems. In this paper, we consider a relaxed semantics for plans with parallel operator a...
Martin Wehrle, Jussi Rintanen
CODES
2004
IEEE
15 years 10 months ago
System-on-chip validation using UML and CWL
In this paper, a novel method for high-level specification and validation of SoC designs using UML is proposed. UML is introduced as a formal model of specification for SoC design...
Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo...
157
Voted
ECAI
2004
Springer
15 years 10 months ago
Bias Windowing for Relational Learning
A central issue in relational learning is the choice of an appropriate bias for limiting first-order induction. The purpose of this study is to circumvent this issue within a unifo...
Frédéric Koriche
179
Voted
EH
2004
IEEE
131views Hardware» more  EH 2004»
15 years 10 months ago
Swarm Intelligence for Digital Circuits Implementation on Field Programmable Gate Arrays Platforms
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...
Ganesh K. Venayagamoorthy, Venu G. Gudise
DFT
2006
IEEE
85views VLSI» more  DFT 2006»
15 years 9 months ago
Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects
With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the pho...
Yadunandana Yellambalase, Minsu Choi, Yong-Bin Kim