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ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
14 years 1 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira
AGP
1994
IEEE
14 years 24 days ago
What the Event Calculus actually does, and how to do it efficiently
Kowalski and Sergot's Event Calculus (EC) is a formalism for reasoning about time and change in a logic programming framework. From a description of events which occur in the...
Iliano Cervesato, Luca Chittaro, Angelo Montanari
DAC
1994
ACM
14 years 23 days ago
Exact and Approximate Methods for Calculating Signal and Transition Probabilities in FSMs
In this paper, we consider the problem of calculating the signal and transition probabilities of the internal nodes of the combinational logic part of a nite state machine (FSM). ...
Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain
ERSA
2004
134views Hardware» more  ERSA 2004»
13 years 10 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
TII
2010
113views Education» more  TII 2010»
13 years 3 months ago
An Automated Framework for Formal Verification of Timed Continuous Petri Nets
In this paper, we develop an automated framework for formal verification of timed continuous Petri nets (ContPNs). Specifically, we consider two problems: (1) given an initial set ...
Marius Kloetzer, Cristian Mahulea, Calin Belta, Ma...