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» A Logic for Virtual Memory
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OSDI
2004
ACM
16 years 4 months ago
Enhancing Server Availability and Security Through Failure-Oblivious Computing
We present a new technique, failure-oblivious computing, that enables servers to execute through memory errors without memory corruption. Our safe compiler for C inserts checks th...
Martin C. Rinard, Cristian Cadar, Daniel Dumitran,...
ECRTS
2007
IEEE
15 years 10 months ago
Predictable Paging in Real-Time Systems: A Compiler Approach
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
Isabelle Puaut, Damien Hardy
ISLPED
2006
ACM
70views Hardware» more  ISLPED 2006»
15 years 10 months ago
Sub-threshold design: the challenges of minimizing circuit energy
In this paper, we identify the key challenges that oppose subthreshold circuit design and describe fabricated chips that verify techniques for overcoming the challenges. Categorie...
Benton H. Calhoun, Alice Wang, Naveen Verma, Anant...
FIDJI
2004
Springer
15 years 10 months ago
A JMM-Faithful Non-interference Calculus for Java
We present a calculus for establishing non-interference of several Java threads running in parallel. The proof system is built atop an implemented sequential Java Dynamic Logic cal...
Vladimir Klebanov
DAC
2008
ACM
16 years 5 months ago
On the role of timing masking in reliable logic circuit design
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes