This paper presents an on-the-fly and symbolic algorithm for checking whether a timed automaton satisfies a formula of a timed temporal logic which is more expressive than TCTL....
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
We compare di erent degrees of architecture abstraction and communication reliability in distributed programming languages. A nearly architecture independent logic programming lang...
This paper presents experimental measurements of the differences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power cons...
An increasing number of embedded system solutions in space, military, and consumer electronics applications rely on processor cores inside reconfigurable logic devices. Ensuring da...