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HPCA
2005
IEEE
14 years 7 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
CADE
2001
Springer
14 years 7 months ago
More On Implicit Syntax
Proof assistants based on type theories, such as Coq and Lego, allow users to omit subterms on input that can be inferred automatically. While those mechanisms are well known, ad-h...
Marko Luther
SIGMOD
2009
ACM
202views Database» more  SIGMOD 2009»
14 years 7 months ago
ZStream: a cost-based query processor for adaptively detecting composite events
Composite (or Complex) event processing (CEP) systems search sequences of incoming events for occurrences of userspecified event patterns. Recently, they have gained more attentio...
Yuan Mei, Samuel Madden
ICSE
2005
IEEE-ACM
14 years 7 months ago
Real-time specification patterns
Embedded systems are pervasive and frequently used for critical systems with time-dependent functionality. Dwyer et al. have developed qualitative specification patterns to facili...
Sascha Konrad, Betty H. C. Cheng
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
14 years 4 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
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