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» A Logical Architecture of a Normative System
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ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
14 years 3 months ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
SPAA
2010
ACM
14 years 1 months ago
Towards optimizing energy costs of algorithms for shared memory architectures
Energy consumption by computer systems has emerged as an important concern. However, the energy consumed in executing an algorithm cannot be inferred from its performance alone: i...
Vijay Anand Korthikanti, Gul Agha
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
14 years 3 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
JETAI
2007
131views more  JETAI 2007»
13 years 8 months ago
A computational architecture for heterogeneous reasoning
Reasoning, problem solving, indeed the general process of acquiring knowledge, is not an isolated, homogenous affair involving a one agent using a single form of representation, b...
Dave Barker-Plummer, John Etchemendy
WSC
2000
13 years 10 months ago
Soft-commissioning: hardware-in-the-loop-based verification of controller software
The basic idea of Soft-Commissioning (SoftCom) is to test industrial control software by connecting a controller, e. g. a PLC (Programmable Logic Controller) to a commercial discr...
Harald Schludermann, Thomas Kirchmair, Markus Vord...