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» A Logical Characterization of Individual-Based Models
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ASPDAC
2009
ACM
212views Hardware» more  ASPDAC 2009»
14 years 1 months ago
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...
Kwangok Jeong, Andrew B. Kahng
ICALP
2007
Springer
14 years 1 months ago
Regular Languages of Nested Words: Fixed Points, Automata, and Synchronization
Abstract. Nested words are a restriction of the class of visibly pushdown languages that provide a natural model of runs of programs with recursive procedure calls. The usual conne...
Marcelo Arenas, Pablo Barceló, Leonid Libki...
ISQED
2006
IEEE
155views Hardware» more  ISQED 2006»
14 years 1 months ago
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
Bin Zhang, Wei-Shen Wang, Michael Orshansky
ISQED
2005
IEEE
133views Hardware» more  ISQED 2005»
14 years 29 days ago
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis
This paper presents a methodology for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Convention...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
AGP
1999
IEEE
13 years 11 months ago
ACI1 constraints
Disunification is the problem of deciding satisfiability of a system of equations and disequations with respect to a given equational theory. In this paper we study the disunifica...
Agostino Dovier, Carla Piazza, Enrico Pontelli, Gi...