154 search results - page 2 / 31 » A Low Power Highly Associative Cache for Embedded Systems |
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
HIPEAC
2007
Springer
14 years 2 months ago
2007
Springer
Voltage scaling reduces leakage power for cache lines unlikely to be referenced soon. Partitioning reduces dynamic power via smaller, specialized structures. We combine approaches,...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...