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108
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ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
15 years 8 months ago
Retargetable estimation scheme for DSP architecture selection
— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered archite...
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 8 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
ISPD
1999
ACM
106views Hardware» more  ISPD 1999»
15 years 8 months ago
Timing driven maze routing
—This paper studies a natural formulation of the timing-driven maze routing problem. A multigraph model appropriate for global routing applications is adopted; the model naturall...
Sung-Woo Hur, Ashok Jagannathan, John Lillis
EWSPT
1998
Springer
15 years 8 months ago
Fuzzy Dynamics in Software Project Simulation and Support
Established simulation techniques require quantification of relevant aspects of the entity whose behaviour is being investigated. The data expressing the quantification provides a ...
Juan F. Ramil, M. M. Lehman
DAC
1997
ACM
15 years 8 months ago
Hierarchical Sequence Compaction for Power Estimation
- This paper presents an effective technique for compacting a large sequence of input vectors into a much smaller one such that when the two sequences are applied to any circuit, t...
Radu Marculescu, Diana Marculescu, Massoud Pedram